dac.h¶
Digital to Analog Conversion (DAC) support.
Contents
- Types
- Devices
- Functions
- Register Map Base Pointers
- Register Bit Definitions
- Control register
- Software trigger register
- Channel 1 12-bit right-aligned data holding register
- Channel 1 12-bit left-aligned data holding register
- Channel 1 8-bit left-aligned data holding register
- Channel 2 12-bit right-aligned data holding register
- Channel 2 12-bit left-aligned data holding register
- Channel 2 8-bit left-aligned data holding register
- Dual DAC 12-bit right-aligned data holding register
- Dual DAC 12-bit left-aligned data holding register
- Dual DAC 8-bit left-aligned data holding register
- Channel 1 data output register
- Channel 1 data output register
Types¶
-
struct
dac_dev¶ DAC device type.
-
struct
stm32f1::dac_reg_map¶ STM32F1 DAC register map type.
-
struct
stm32f2_f4::dac_reg_map¶ STM32F2-F4 DAC register map type.
Functions¶
-
void
dac_init(const dac_dev *dev, uint32 flags)¶ Initialize the digital to analog converter.
- Side Effects:
- May set PA4 or PA5 to INPUT_ANALOG
- Parameters
dev-DAC device
flags-Flags: DAC_CH1: Enable channel 1 DAC_CH2: Enable channel 2
-
void
dac_write_channel(const dac_dev *dev, uint8 channel, uint16 val)¶ Write a 12-bit value to the DAC to output.
- Parameters
dev-DAC device
channel-channel to select (1 or 2)
val-value to write
Register Map Base Pointers¶
-
DAC_BASE¶
Register Bit Definitions¶
Control register¶
Channel 1:
-
DAC_CR_EN1¶
-
DAC_CR_BOFF1¶
-
DAC_CR_TEN1¶
-
DAC_CR_TSEL1¶
-
DAC_CR_WAVE1¶
-
DAC_CR_MAMP1¶
-
DAC_CR_DMAEN1¶
Channel 2:
-
DAC_CR_EN2¶
-
DAC_CR_BOFF2¶
-
DAC_CR_TEN2¶
-
DAC_CR_TSEL2¶
-
DAC_CR_WAVE2¶
-
DAC_CR_MAMP2¶
-
DAC_CR_DMAEN2¶
Channel 1 12-bit right-aligned data holding register¶
-
DAC_DHR12R1_DACC1DHR¶
Channel 1 12-bit left-aligned data holding register¶
-
DAC_DHR12L1_DACC1DHR¶
Channel 1 8-bit left-aligned data holding register¶
-
DAC_DHR8R1_DACC1DHR¶
Channel 2 12-bit right-aligned data holding register¶
-
DAC_DHR12R2_DACC2DHR¶
Channel 2 12-bit left-aligned data holding register¶
-
DAC_DHR12L2_DACC2DHR¶
Channel 2 8-bit left-aligned data holding register¶
-
DAC_DHR8R2_DACC2DHR¶
Channel 1 data output register¶
-
DAC_DOR1_DACC1DOR¶
Channel 1 data output register¶
-
DAC_DOR2_DACC2DOR¶